KYOCERA AVX 4.7μF MLCC, 10V dc V, ±10% , SMD
Technical Document
Specifications
Brand
KYOCERA AVXCapacitance
4.7µF
Voltage
10V dc
Package/Case
1206 (3216M)
Mounting Type
Surface Mount
Dielectric
X5R
Tolerance
±10%
Dimensions
3.2 x 1.6 x 1.5mm
Length
3.2mm
Depth
1.6mm
Height
1.5mm
Suppression Class
Class II
Maximum Operating Temperature
+85°C
Minimum Operating Temperature
-55°C
Terminal Type
Surface Mount
Country of Origin
United States
Product details
AVX 1206 MLCC Series
X7R formulations are called “temperature stable” ceramics and fall into EIA Class II materials, and COG (NPO) is the most popular “temperature-compensating” EIA Class I ceramic materials
Multilayer Ceramic Capacitors whose temperature variation is within ±15% from -55°C to +125°C
The capacitance change is non-linear
AVX high voltage chips have advantages of high value, low leakage and small size, thus applications include as snubbers in high frequency power converters, resonators in SMPS and high voltage coupling/DC blocking
These high voltage chip designs exhibit low ESRs at high frequencies
1206 Range
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P.O.A.
2000
P.O.A.
2000
Technical Document
Specifications
Brand
KYOCERA AVXCapacitance
4.7µF
Voltage
10V dc
Package/Case
1206 (3216M)
Mounting Type
Surface Mount
Dielectric
X5R
Tolerance
±10%
Dimensions
3.2 x 1.6 x 1.5mm
Length
3.2mm
Depth
1.6mm
Height
1.5mm
Suppression Class
Class II
Maximum Operating Temperature
+85°C
Minimum Operating Temperature
-55°C
Terminal Type
Surface Mount
Country of Origin
United States
Product details
AVX 1206 MLCC Series
X7R formulations are called “temperature stable” ceramics and fall into EIA Class II materials, and COG (NPO) is the most popular “temperature-compensating” EIA Class I ceramic materials
Multilayer Ceramic Capacitors whose temperature variation is within ±15% from -55°C to +125°C
The capacitance change is non-linear
AVX high voltage chips have advantages of high value, low leakage and small size, thus applications include as snubbers in high frequency power converters, resonators in SMPS and high voltage coupling/DC blocking
These high voltage chip designs exhibit low ESRs at high frequencies