Texas Instruments SN74LVC1G08QDCKRQ1 2-Input AND Logic Gate, 5-Pin SC-70
Technical Document
Specifications
Brand
Texas InstrumentsLogic Function
AND
Mounting Type
Surface Mount
Number Of Elements
1
Number of Inputs per Gate
2
Schmitt Trigger Input
No
Package Type
SC-70
Pin Count
5
Logic Family
LVC
Maximum Operating Supply Voltage
5.5 V
Maximum High Level Output Current
-32mA
Maximum Propagation Delay Time @ Maximum CL
6 ns @ 5 V, 6.5 ns @ 3.3 V
Minimum Operating Supply Voltage
1.65 V
Maximum Low Level Output Current
32mA
Minimum Operating Temperature
-40 °C
Height
0.9mm
Dimensions
2 x 1.25 x 0.9mm
Propagation Delay Test Condition
50pF
Maximum Operating Temperature
+125 °C
Length
2mm
Width
1.25mm
Product details
74LVC1G Family, Texas Instruments
Low-Voltage CMOS logic
Single gate package
Operating Voltage: 1.65 to 5.5 V
Compatibility: Input LVTTL/TTL, Output LVCMOS
Latch-up performance exceeds 100 mA per JESD 78 Class II
ESD protection exceeds JESD 22
74LVC Family
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€ 0.291
Each (In a Pack of 10) (ex VAT)
Standard
10
€ 0.291
Each (In a Pack of 10) (ex VAT)
Standard
10
Buy in bulk
| quantity | Unit price | Per Pack |
|---|---|---|
| 10 - 40 | € 0.291 | € 2.91 |
| 50 - 90 | € 0.275 | € 2.75 |
| 100 - 240 | € 0.249 | € 2.49 |
| 250 - 490 | € 0.224 | € 2.24 |
| 500+ | € 0.213 | € 2.13 |
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Technical Document
Specifications
Brand
Texas InstrumentsLogic Function
AND
Mounting Type
Surface Mount
Number Of Elements
1
Number of Inputs per Gate
2
Schmitt Trigger Input
No
Package Type
SC-70
Pin Count
5
Logic Family
LVC
Maximum Operating Supply Voltage
5.5 V
Maximum High Level Output Current
-32mA
Maximum Propagation Delay Time @ Maximum CL
6 ns @ 5 V, 6.5 ns @ 3.3 V
Minimum Operating Supply Voltage
1.65 V
Maximum Low Level Output Current
32mA
Minimum Operating Temperature
-40 °C
Height
0.9mm
Dimensions
2 x 1.25 x 0.9mm
Propagation Delay Test Condition
50pF
Maximum Operating Temperature
+125 °C
Length
2mm
Width
1.25mm
Product details
74LVC1G Family, Texas Instruments
Low-Voltage CMOS logic
Single gate package
Operating Voltage: 1.65 to 5.5 V
Compatibility: Input LVTTL/TTL, Output LVCMOS
Latch-up performance exceeds 100 mA per JESD 78 Class II
ESD protection exceeds JESD 22
74LVC Family
Ideate. Create. Collaborate
JOIN FOR FREE
No hidden fees!
- Download and use our DesignSpark software for your PCB and 3D Mechanical designs
- View and contribute website content and forums
- Download 3D Models, Schematics and Footprints from more than a million products