Nexperia 74LVC1G08GW,125 2-Input AND Logic Gate, 5-Pin TSSOP
Technical Document
Specifications
Brand
NexperiaLogic Function
AND
Mounting Type
Surface Mount
Number Of Elements
1
Number of Inputs per Gate
2
Schmitt Trigger Input
No
Package Type
TSSOP
Pin Count
5
Logic Family
LVC
Maximum Operating Supply Voltage
5.5 V
Maximum High Level Output Current
-32mA
Minimum Operating Supply Voltage
1.65 V
Maximum Low Level Output Current
32mA
Height
1mm
Width
1.35mm
Minimum Operating Temperature
-40 °C
Dimensions
2.25 x 1.35 x 1mm
Maximum Operating Temperature
+125 °C
Propagation Delay Test Condition
50pF
Length
2.25mm
Country of Origin
Malaysia
Product details
74LVC1G/74LVC2G Family
Low-Voltage CMOS logic
Single gate package
Operating Voltage: 1.65 to 5.5 V
Compatibility: Input LVTTL/TTL, Output LVCMOS
74LVC Family
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€ 0.025
Each (On a Reel of 3000) (ex VAT)
3000
€ 0.025
Each (On a Reel of 3000) (ex VAT)
3000
Ideate. Create. Collaborate
JOIN FOR FREE
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Technical Document
Specifications
Brand
NexperiaLogic Function
AND
Mounting Type
Surface Mount
Number Of Elements
1
Number of Inputs per Gate
2
Schmitt Trigger Input
No
Package Type
TSSOP
Pin Count
5
Logic Family
LVC
Maximum Operating Supply Voltage
5.5 V
Maximum High Level Output Current
-32mA
Minimum Operating Supply Voltage
1.65 V
Maximum Low Level Output Current
32mA
Height
1mm
Width
1.35mm
Minimum Operating Temperature
-40 °C
Dimensions
2.25 x 1.35 x 1mm
Maximum Operating Temperature
+125 °C
Propagation Delay Test Condition
50pF
Length
2.25mm
Country of Origin
Malaysia
Product details
74LVC1G/74LVC2G Family
Low-Voltage CMOS logic
Single gate package
Operating Voltage: 1.65 to 5.5 V
Compatibility: Input LVTTL/TTL, Output LVCMOS
74LVC Family
Ideate. Create. Collaborate
JOIN FOR FREE
No hidden fees!
- Download and use our DesignSpark software for your PCB and 3D Mechanical designs
- View and contribute website content and forums
- Download 3D Models, Schematics and Footprints from more than a million products